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STPM098C 数据表(PDF) 79 Page - STMicroelectronics |
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STPM098C 数据表(HTML) 79 Page - STMicroelectronics |
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79 / 110 page ![]() Figure 65. Digital compensator simplified block diagram Digital Compensator PID LP2 LP1 GC ADC_Ln VADC_IN_Ln PWM Mod The PID LP filter 1 and filter 2 can be programmed through a dedicated PMBus™ register as follows: MFRFILTERPREPOST14:7= TckTck+τLP128 (35) MFRFILTERPREPOST6:0= TckTck+τLP227 (36) The PID Kn parameters for the n-th loop can be programmed through a dedicated PMBus™ register as follows: MFRPID118:0=8Kp+KdTck (37) MFRPID215:0=216KiTCK (38) MFRPID315:0=KdTck (39) Where: Tck is the system clock period. MFR_FILT_PRE_POST [6:0] are the dedicated PMBus™ configuration bits. In order to prevent compensator persistent integration after a heavy to light load transition, a digital error clamp limit can be set through a dedicated PMBus™ command as follows: VERRCLAMP=ΔLSB× 63−VERRCLAMP5:0 (40) Where: ΔLSB is the minimum slew rate step [2 mV]. VERR_CLAMP [5:0] is the dedicated PMBus™ configuration bits [0 ~ 126 mV]. The default value is VERR_CLAMP = 0x00. To enhance control loop dynamic performances during load transients, STPM098C implements a function that doubles the controller proportional gain factor when digital error exceeds a programmable threshold. Transient gain boost function can be configured by means of TGB_CONFIG register as follows: TGBTH=TGBTHlsb×TGBCONFIG7:2 (41) Where: TGB_TH_lsb is the minimum drooping step [2 mV]. TGB_CONFIG [7:2] are the dedicated PMBus™ configuration bits [0 mV ~ 126 mV]. The default value is TGB_CONFIG [7:2] = 0x3F. TGBEN=TGBCONFIG7:2 (42) Where: TGB_CONFIG [1:0] are the dedicated PMBus™ configuration bits: 00, TGB disabled. 01, TGB is enabled only when N ≥ 2 (N is the number of active phases). 10, TGB always enabled. 10, TGB always enabled. TBG threshold = 2x TGB_TH For further details concerning loop compensator and deeper details on mathematical aspects, refer to the Application note: “STPM098C_AN_PID_setting”. STPM098C Functional description DS14440 - Rev 1 page 79/110 |
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