STPM098C datasheet(91/110 Pages) STMICROELECTRONICS

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Table 72. ZC offset2 configuration bit

GAINZC2

GAINZC1

GAINZC0

Description

ZC_OFFSET = -3.2 mV (default)

ZC_OFFSET = -9.6 mV

ZC_OFFSET = -16 mV

ZC_OFFSET = -22.4 mV

ZC_OFFSET = 22.4 mV

ZC_OFFSET = 16 mV

ZC_OFFSET = 9.6 mV

ZC_OFFSET = 3.2 mV

Figure 76. Zero-current detection simplified block diagram

DIGITAL

LOOP

CTRL

HIZ

ISENn

VREF1/CFILT

PWMn

GND

VCC

DRV

GND

VREF2/CFILT

ZC_MASK_DELAY

PWM

ZC_OFFSET

Zero current detection masking time in terms of successive PWM periods can be configured by a dedicated

PMBus™ bit ZC_MASK_DELAY<2:0>.

ZCMASKDELAY=ZCMASKDELAYlsb×ZCMASKDELAY2:0

(65)

Where:

ZC_MASK_DELAY_lsb is the minimum masking step [25 ns].

ZC_MASK_DELAY [2:0] are the dedicated PMBus™ configuration bits [0 ~ 175 ns].

The default value is ZC_MASK_DELAY = 0x0.

This nonlinear control forces the DrMOS state according to control loop assertion while switch DrMOS to tristate

as soon as phase current crosses the zero level, thus emulating an asynchronous rectification.

As a consequence of this behavior the loop controller reacts by linearly reducing the equivalent switching

frequency that effectively results in lowered switching losses.

STPM098C

Functional description

DS14440 - Rev 1

page 91/110

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