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ADAR4002ACPZ-R7 数据表(PDF) 49 Page - Analog Devices

部件名 ADAR4002ACPZ-R7
功能描述  0.5 GHz to 19 GHz, 1-Channel, Bidirectional True Time Delay Unit
PDF  66 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADAR4002ACPZ-R7 数据表(HTML) 49 Page - Analog Devices

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Data Sheet
ADAR4002
REGISTER MAP
analog.com
Rev. A | 49 of 66
Table 14. ADAR4002 Register Summary
Addr
Name
Bits Bit Name
Description
Reset Access
0x00
ADI_SPI_CONFIG_A
7
SOFTRESET_
Soft Reset. Broadcast to all chips on the SPI bus.
0x0
R/W
6
LSB_FIRST_
LSB First.
0x0
R/W
5
ENDIAN_
Endian. Clear = descend and set = ascend.
0x1
R/W
4
SDOACTIVE_
SDO Active
0x1
R/W
3
SDOACTIVE
SDO Active
0x1
R/W
2
ENDIAN
Address Ascension on Block Writes. Clear = descend and
set = ascend.
0x1
R/W
1
LSB_FIRST
LSB First.
0x0
R/W
0
SOFTRESET
Soft Reset. Broadcast to all chips on the SPI bus.
0x0
R/W
0x01
ADI_SPI_CONFIG_B
7
SINGLE_INSTRUCTION
Single Instruction.
0x0
R/W
6
CSB_STALL
CSB Stall.
0x0
R/W
5
CONTROLLER_TARGET_RB
Controller and Target RB.
0x0
R/W
4
SLOW_INTERFACE
Slow Interface Control.
0x0
R/W
3
RESERVED
Reserved.
0x0
R
2
SOFTRESET2
Soft Reset 2.
0x0
R/W
1
SOFTRESET1
Soft Reset 1.
0x0
R/W
0
RESERVED
Reserved
0x0
R
0x03
CHIPTYPE
[7:0] CHIPTYPE
Chip Type, Read Only.
0x1
R
0x04
PRODUCT_ID_L
[7:0] PRODUCT_ID_L
Product_ID_L, Lower Eight Bits.
0x3
R
0x05
PRODUCT_ID_H
[7:0] PRODUCT_ID_H
Product_ID_H, Higher Eight Bits.
0x0
R
0x06
CHIP_GRADE
[7:4] BEOL
BEOL Version.
0x0
R
[3:0] FEOL
FEOL Version.
0x0
R
0x08
ADDRESS_PAGE
[7:4] RESERVED
Reserved.
0x0
R
[3:0] ADDR_PAGE
Not applicable.
0x0
R/W
0x0A
SCRATCHPAD
[7:0] SCRATCHPAD
Scratch Pad.
0x0
R/W
0x0B
SPI_REV
[7:4] RESERVED
Reserved.
0x0
R
[3:0] SPI_REV
SPI Register Map Revision.
0x1
R
0x0C
VENDOR_ID_L
[7:0] VENDOR_ID_L
Vendor ID Low Byte. Read only, value = 0x56.
0x56
R
0x0D
VENDOR_ID_H
[7:0] VENDOR_ID_H
Vendor ID High Byte. Read only, value = 0x04.
0x4
R
0x10
SEQUENCERA_START
[7:5] RESERVED
Reserved.
0x0
R
[4:0] SEQUENCERA_START
Start Value of Sequencer A.
0x0
R/W
0x11
SEQUENCERA_STOP
[7:5] RESERVED
Reserved.
0x0
R
[4:0] SEQUENCERA_STOP
Stop Value of Sequencer A.
0x1F
R/W
0x12
SEQUENCERB_START
[7:5] RESERVED
Reserved.
0x0
R
[4:0] SEQUENCERB_START
Start Value of Sequencer B.
0x0
R/W
0x13
SEQUENCERB_STOP
[7:5] RESERVED
Reserved.
0x0
R
[4:0] SEQUENCERB_STOP
Stop Value of Sequencer B.
0x1F
R/W
0x14
SEQUENCER_DIRECTIONS
[7:5] RESERVED
Reserved.
0x0
R
4
SEQUENCERA_DIRECTION
Direction of Sequencer A. 1 = ascend, and 0 = descend.
0x1
R/W
[3:1] RESERVED
Reserved.
0x0
R
0
SEQUENCERB_DIRECTION
Direction of Sequencer B. 1 = ascend, and 0 = descend.
0x1
R/W
0x15
SEQUENCER_RESET
[7:5] RESERVED
Reserved.
0x0
R
4
SEQUENCERA_RESET
Reset Sequencer A to SEQUENCERA_START.
0x0
R/W
[3:1] RESERVED
Reserved.
0x0
R
0
SEQUENCERB_RESET
Reset Sequencer B to SEQUENCERB_START.
0x0
R/W
0x16
SEQUENCERA_B
[7:1] RESERVED
Reserved.
0x0
R
0
SEQUENCERA_B
Sequencer A = 0, and Sequencer B = 1.
0x0
R/W



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