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SSM3582ACPZ-R7 数据表(PDF) 30 Page - Analog Devices |
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SSM3582ACPZ-R7 数据表(HTML) 30 Page - Analog Devices |
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30 / 58 page ![]() SSM3582A Data Sheet Rev. A | Page 30 of 58 STANDALONE OPERATION The SSM3582A can be operated in a standalone hardware control mode without any I2C control. The same ADDRx pins used to set the I2C device address are used to set the functionality of the device. In standalone mode, the I2C pins (SCL and SDA) are inputs and are shorted to DVDD or AGND to set the TDM slot/sample rate of the device (see Table 18). In this case, the ANA_GAIN bits are set to 11 and SPWDN is set to 0 by default. In standalone mode, TDM slot selection, mono mode operation, and sample rate are selected via different pin settings. The device monitors the FSYNC signal and, if it is a 50% duty cycle, uses I2S settings. If the FYSNC signal is a pulse, the device uses TDM settings. Table 18. Standalone Mode Pin Settings and Functionality Sample Rate Pin States TDM Slot(s) MONO Bit ADDR0 ADDR1 SDA SCL 32 kHz to 48 kHz 0 Open 0 0 1, 2 0 1 Open 0 0 3, 4 0 Pull-down Open 0 0 5, 6 0 Pull-up Open 0 0 7, 8 0 Open 0 0 0 9, 10 0 Open 1 0 0 11, 12 0 Open Pull-down 0 0 13, 14 0 Open Pull-up 0 0 15, 16 0 8 kHz to 12 kHz Open Open 0 0 1, 2 0 32 kHz to 48 kHz 0 Open 0 1 1 1 1 Open 0 1 2 1 Pull-down Open 0 1 3 1 Pull-up Open 0 1 4 1 Open 0 0 1 5 1 Open 1 0 1 6 1 Open Pull-down 0 1 7 1 Open Pull-up 0 1 8 1 8 kHz to 12 kHz Open Open 0 1 1, 2 1 64 kHz to 96 kHz 0 Open 1 0 1, 2 0 1 Open 1 0 3, 4 0 Pull-down Open 1 0 5, 6 0 Pull-up Open 1 0 7, 8 0 Open 0 1 0 9, 10 0 Open 1 1 0 11, 12 0 Open Pull-down 1 0 13, 14 0 Open Pull-up 1 0 15, 16 0 16 kHz to 24 kHz Open Open 1 0 1, 2 0 64 kHz to 96 kHz 0 Open 1 1 1 1 1 Open 1 1 2 1 Pull-down Open 1 1 3 1 Pull-up Open 1 1 4 1 Open 0 1 1 5 1 Open 1 1 1 6 1 Open Pull-down 1 1 7 1 Open Pull-up 1 1 8 1 128 kHz to 192 kHz Open Open 1 1 1, 2 0 |
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