SSM3582ACPZ-R7 datasheet(37/58 Pages) AD

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Data Sheet

SSM3582A

Rev. A | Page 37 of 58

LAYOUT

As output power increases, care must be taken to lay out PCB

traces and wires properly among the amplifier, load, and power

supply. A poor layout increases voltage drops, consequently

decreasing efficiency. A good practice is to use short, wide PCB

tracks to decrease voltage drops and minimize inductance. For

the lowest dc resistance (DCR) and minimum inductance,

ensure that track widths for the outputs are at least 200 mil for

every inch of length and use 1 oz. or 2 oz. copper.

To maintain high output swing and high peak output power,

and to maintain minimal trace resistances, the PCB traces that

connect the output pins to the load and supply pins must be as

wide as possible. In addition, good PCB layout isolates critical

analog paths from sources of high interference. Separate high

frequency circuits (analog and digital) from low frequency circuits.

PVDD and PGND carry most of the device current, and must

be properly decoupled with multiple capacitors at the device

pins. To minimize ground bounce, use independent large traces

to carry PVDD and PGND to the power supply, thus reducing

the amount of noise the amplifier bridges inject in the circuit,

particularly if common ground impedance is significant. Proper

grounding guidelines help improve audio performance, minimize

crosstalk between channels, and prevent switching noise from

coupling into the audio signal.

Properly designed multilayer PCBs can reduce EMI emission

and increase immunity to the RF field by a factor of 10 or more,

compared with double sided boards. A multilayer board allows

a complete layer to be used for the ground plane, whereas the

ground plane side of a double sided board is often disrupted by

signal crossover.

If the system has separate analog and digital ground and power

planes, the analog ground plane must be directly beneath the

analog power plane, and, similarly, the digital ground plane must

be directly beneath the digital power plane. There must be no

overlap between the analog and digital ground planes or between

the analog and digital power planes.

SSM3582ACPZ-R7 数据表(PDF) 37 Page - Analog Devices

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