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SSM3582ACPZ-R7 数据表(PDF) 48 Page - Analog Devices

部件名 SSM3582ACPZ-R7
功能描述  2×, 31.76 W, Digital Input, Filterless Stereo Class D Audio Amplifier
PDF  58 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

SSM3582ACPZ-R7 数据表(HTML) 48 Page - Analog Devices

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SSM3582A
Data Sheet
Rev. A | Page 48 of 58
Address: 0x10, Reset: 0x22, Name: LIM_LEFT_CTRL3
Left Lim iter Battery Voltage Inflection
Point.
0
0
1
1
2
0
3
0
4
0
5
1
6
0
7
0
[7:0] VBAT_INF_L (R/W)
Table 39. Bit Descriptions for LIM_LEFT_CTRL3
Bits
Bit Name
Settings
Description
Reset
Access
[7:0]
VBAT_INF_L
Left Limiter Battery Voltage Inflection Point.
0x22
R/W
Address: 0x11, Reset: 0xA8, Name: LIM_RIGHT_CTRL1
Right Lim iter Releas e Rate.
11: 800 m s /dB.
10: 1200 m s /dB.
1: 1600 m s /dB.
0: 3200 m s /dB.
Right Lim iter Mode.
11: Lim iter on only if VBAT<VBAT_INF_R.
10: Mute output if VBAT<VBAT_INF_R.
1: Lim iter on.
0: Lim iter off.
Right Lim iter Attack Rate.
11: 20 µs /dB.
10: 30 µs /dB.
1: 60 µs /dB.
0: 120 µs /dB.
Right Thres hold Battery Tracking.
1:
bits in Regis ter 0x12.
VBAT<VBAT_INF_R us ing SLOPE_R
Ram p down lim iter thres hold when
0:
bits in Regis ter 0x12.
Fixed lim iter thres hold s et by LIM_THRES_R
Channel Lim iter Link.
1:
(us e left lim iter controls ).
Link both channels to one lim iter
0:
lim iters .
Us e independent left and right channel
0
0
1
0
2
0
3
1
4
0
5
1
6
0
7
1
[7:6] LIM_RRT_R (R/W)
[1:0] LIM_EN_R (R/W)
[5:4] LIM_ATR_R (R/W)
[2] VBAT_TRACK_R (R/W)
[3] LIM_LINK (R/W)
Table 40. Bit Descriptions for LIM_RIGHT_CTRL1
Bits
Bit Name
Settings
Description
Reset
Access
[7:6]
LIM_RRT_R
Right Limiter Release Rate.
0x2
R/W
0
3200 ms/dB.
1
1600 ms/dB.
10
1200 ms/dB.
11
800 ms/dB.
[5:4]
LIM_ATR_R
Right Limiter Attack Rate.
0x2
R/W
0
120 µs/dB.
1
60 µs/dB.
10
30 µs/dB.
11
20 µs/dB.
3
LIM_LINK
Channel Limiter Link.
0x1
R/W
0
Use independent left and right channel limiters.
1
Link both channels to one limiter (use left limiter controls).
2
VBAT_TRACK_R
Right Threshold Battery Tracking.
0x0
R/W
0
Fixed limiter threshold set by LIM_THRES_R Bits in Register 0x12.
1
Ramp down limiter threshold when VBAT < VBAT_INF_R using SLOPE_R Bits
in Register 0x12.
[1:0]
LIM_EN_R
Right Limiter Mode.
0x0
R/W
0
Limiter off.
1
Limiter on.
10
Mute output if VBAT < VBAT_INF_R.
11
Limiter on only if VBAT < VBAT_INF_R.



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