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RC19302A00AGNT#KD0 数据表(PDF) 36 Page - Renesas Technology Corp

部件名 RC19302A00AGNT#KD0
功能描述  PCIe Gen7 1.8V 2-Input Clock Mux Family with LOS
PDF  62 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

RC19302A00AGNT#KD0 数据表(HTML) 36 Page - Renesas Technology Corp

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R31DS0210EU0106 Rev.1.06
Page 36
May 11, 2026
RC193xx Datasheet
4.5.4
VENDOR_REVISION_ID
Vendor ID, Revision ID Register.
4.5.5
DEVICE_ID
Device ID Register.
4.5.6
BYTE_COUNT
Number of Bytes Returned on an SMBus Block Read.
4.5.7
SLEW_AMP_SELECT
Multifunction Pin Configuration Register.
VENDOR_REVISION_ID Bit Field Descriptions
Bit Field
Field Name
Field
Type
Default
Value
Description
7:4
rid
RO
0x0
Revision ID. Silicon revision.
0x0 = A revision
3:0
vid
RO
0x1
Vendor ID. Vendor ID.
0x1 = Renesas
DEVICE_ID Bit Field Descriptions
Bit Field
Field Name
Field
Type
Default
Value
Description
7:0
device_id
RO
0x38
Device ID. RC19308 listed as default.
0x38 = RC19308
0x34 = RC19304
0x32 = RC19302
BYTE_COUNT Bit Field Descriptions
Bit Field
Field Name
Field
Type
Default
Value
Description
7:5
reserved
RW
0x0
Reserved
4:0
byte_count
RW
0x7
Writing to this register configures how many bytes will be returned on an
SMBus block read.
SLEW_AMP_SELECT Bit Field Descriptions
Bit Field
Field Name
Field
Type
Default
Value
Description
7
slew_amp_sel
RW
0x0
Multifunction pin selection. The pin is defined as either Slew Rate Select or
Amplitude Select. If Amplitude Select is chosen, refer to registers 0x10 and
0x11.
0 = Pin is Slew Rate Select pin (RC193xxA)
1 = Pin is Amplitude Select pin (RC193xxA001)
6
reserved
RW
0x0
Reserved
5:4
clksel_1_0
RW
0x0
Clock mux select. These bits allow software control of the input clock mux.
0 = Both bank from CLKIN0
1 = Bank0 from CLKIN0, bank1 from CLKIN1
2 = Invalid
3 = Both bank from CLKIN1
3:1
reserved
RW
0x0
Reserved
0
clksel_cntrl
RW
0x0
Select pin or software control of the clock mux. Pin control is the power up
default.
0 = Use CLKSEL pin control
1 = Use software control (B0xA [5:4]



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