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RC19302A00AGNT#KD0 数据表(PDF) 26 Page - Renesas Technology Corp

部件名 RC19302A00AGNT#KD0
功能描述  PCIe Gen7 1.8V 2-Input Clock Mux Family with LOS
PDF  62 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

RC19302A00AGNT#KD0 数据表(HTML) 26 Page - Renesas Technology Corp

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R31DS0210EU0106 Rev.1.06
Page 26
May 11, 2026
RC193xx Datasheet
2.4.7
I/O Electrical Characteristics
2.4.8
Power Supply Current
Table 24. I/O Electrical Characteristics
Symbol
Parameter
Conditions
Minimum
Typical Maximum Unit
VIH
Input High Voltage [1][2]
1. For SCLK and SDATA, see Table 26.
2. These values are compliant with JESD8-7A 1.8V Normal Range.
Single-ended inputs, unless otherwise listed.
0.65 ×
VDD
-
VDD + 0.3
V
VIL
Input Low Voltage [1][2]
-0.3
-
0.35 ×
VDD
V
VIH
Input High Voltage
SADR_tri[1:0].
0.75 ×
VDD
-
VDD + 0.3
V
VIM
Input Mid Voltage
0.45 ×
VDD
0.5 ×
VDD
0.55 ×
VDD
V
VIL
Input Low Voltage
-0.3
-
0.25 ×
VDD
V
VOL
Output Low Voltage
LOSb, IOL = 2mA.
-
0.1
0.4
V
IIH
Input Leakage Current
High, VIN = VDD
CLKIN
5
-
15
μA
CLKINb
-3
-
+3
PWRGD_PWRDNb
-35
-
-20
SADR_tri[1:0]
25
-
35
Single-ended inputs not otherwise listed
25
-
35
IIL
Input Leakage Current
Low, VIN = 0V
CLKIN
-3
-
+3
μA
CLKINb
-12
-
-6
PWRGD_PWRDNb
-35
-
-20
SADR_tri[1:0]
-35
-
-20
Single-ended inputs not otherwise listed
-35
-
-20
Rp
PD_CLKIN
Value of internal pull-down resistor to ground
(CLKIN)
-
53
-
kΩ
PU_CLKINb
Value of internal pull-up resistor to 0.5V (CLKINb).
-
57
-
Pull-up/Pull-down
Resistor
Single-ended inputs.
-
125
-
Zo
Output Impedance
CLK/CLKb single-ended impedance, 85Ω setting
-
34
-
Ω
CLK/CLKb single-ended impedance, 100Ω setting
-
39
-
CLK/CLKb single-ended impedance, 34Ω setting
-
14
-
Table 25. Power Supply Current [1][2][3]
Symbol
Parameter
Conditions
Minimum
Typical
Maximum
Unit
IDDCLK_X
VDDCLK_X Operating Current
per Output Pair, 100Ω
impedance [4]
Fast slew rate, source-terminated load at
100MHz. PWRGD_PWRDNb = 1.
-
8.5
9.0
mA
Fast slew rate, double-terminated load at
100MHz. PWRGD_PWRDNb = 1.
-
10.0
10.5
Fast slew rate, source-terminated load at
maximum output frequency.
PWRGD_PWRDNb = 1.
-
10.8
11.1
Fast slew rate, double-terminated load at
maximum output frequency.
PWRGD_PWRDNb = 1.
-
13.0
13.4



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