RC19302A00AGNT#KD0 datasheet(9/62 Pages) RENESAS

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R31DS0210EU0106 Rev.1.06

Page 9

May 11, 2026

RC193xx Datasheet

VDDIN1

PWR

Power supply for clock input 1.

CLKSEL_tri

I, SE, PD,

Input to select differential input clock 0 or differential input clock 1. This input has an

internal pull-up and pull-down resistor to bias a floating pin to the mid-point.

0 = CLKIN0 selected for all outputs.

1 = CLKIN1 selected for all outputs.

M = CLKIN0 goes to bank 0 and CLKIN1 goes to bank 1.

OEb6

I, SE, PU,

PDT

Active low input for enabling output 6.

0 = Enable output, 1 = Disable output.

CLK6

O, DIF

True clock output.

CLKb6

O, DIF

Complementary clock output.

VDDCLK_1

PWR

Power supply for clock output bank 1.

CLK5

O, DIF

True clock output.

CLKb5

O, DIF

Complementary clock output.

(RC19304A)

SLEWRATE_SEL

I, SE, PU,

PDT

Input to select default output slew rate.

0 = Slow slew rate.

1 = Fast slew rate.

(RC19304A0

01)

AMPLITUDE_SEL

I, SE, PD,

PDT

Input to select output amplitude. The values are programmable with defaults listed below.

See AMP_CTRL_DEF for default amplitude and AMP_CTRL_ALT for alternate

amplitude.

0 = Select Default Amplitude (800mV),

1 = Select Alternate Amplitude (900mV)

OEb5

I, SE, PU,

PDT

Active low input for enabling output 5.

0 = Enable output, 1 = Disable output.

LOSb

O, OD,

PDT

Output indicating Loss of Input Signal. This pin is an open drain output and requires an

external pull up resistor for proper functionality. A low output on this pin indicates a loss of

signal on the input clock.

VDDA

PWR

Power supply for analog circuitry.

OEb2

I, SE, PU,

PDT

Active low input for enabling output 2.

0 = Enable output, 1 = Disable output.

CLK2

O, DIF

True clock output.

CLKb2

O, DIF

Complementary clock output.

VDDCLK_0

PWR

Power supply for clock output bank 0.

CLK1

O, DIF

True clock output.

CLKb1

O, DIF

Complementary clock output.

OEb1

I, SE, PU,

PDT

Active low input for enabling output 1.

0 = Enable output, 1 = Disable output.

VDDDIG

PWR

Digital power.

GNDSUB

GND

Ground pin for substrate.

ZOUTSEL_tri

I, SE, PD,

Input to select differential output impedance.

0 = 85Ω, 1 = 100Ω, M = 34Ω

Note: This pin is bi-level on the RC19204 clock multiplexer with an internal pull-down,

which results in a default output impedance of 85Ω when left floating.

This pin is tri-level on the RC19304 with both internal pull-up and pull-down resistors.

On the RC19304, this results in a default output impedance of 34Ω when left floating.

This pin must be pulled down or pulled up to select an output impedance of 85Ω or 100Ω,

respectively.

EPAD

GND

Connect to ground.

Table 2. RC19304A/A001 Pin Descriptions (Cont.)

Pin Number

Pin Name

Type

Description

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