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RC19302A00AGNT#KD0 数据表(PDF) 23 Page - Renesas Technology Corp

部件名 RC19302A00AGNT#KD0
功能描述  PCIe Gen7 1.8V 2-Input Clock Mux Family with LOS
PDF  62 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

RC19302A00AGNT#KD0 数据表(HTML) 23 Page - Renesas Technology Corp

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R31DS0210EU0106 Rev.1.06
Page 23
May 11, 2026
RC193xx Datasheet
3. Measured at crossing point where the instantaneous voltage value of the rising edge of CLK equals the falling edge of CLKb.
4. Refers to the total variation from the lowest crossing point to the highest, regardless of which edge is crossing. Refers to all crossing points for
this measurement.
5. Defined as the total variation of all crossing voltages of Rising CLK and Falling CLKb. This is the maximum allowed variance in VCROSS for any
particular system.
6. Measured from differential waveform.
Table 19. 85 ohm CLK AC/DC Characteristics – Double-Terminated, Non-PCIe Applications [1]
1. Both Tx and Rx are terminated (double-terminated) with CL= 2pF. This reduces amplitude by 50%. See Test Loads.
Symbol
Parameter
Conditions
Minimum
Typical
Maximum Unit
VOH
Output High Voltage [2]
2. Measured from single-ended waveform.
VHIGH = 800mV, Fast Slew Rate,
156.25MHz, 312.5MHz - amplitude is reduced
by ~50% due to double termination. (Slow slew
rate is not recommended for frequencies
>100MHz)
382
410
436
mV
VOL
Output Low Voltage [2]
-8
13
33
VCROSS Crossing Voltage (abs) [3]
3. Measured at crossing point where the instantaneous voltage value of the rising edge of CLK equals the falling edge of CLKb.
186
206
226
ΔVCROSS Crossing Voltage (var) [3][4][5]
4. Refers to the total variation from the lowest crossing point to the highest, regardless of which edge is crossing. Refers to all crossing points for
this measurement.
5. Defined as the total variation of all crossing voltages of Rising CLK and Falling CLKb. This is the maximum allowed variance in VCROSS for any
particular system.
-9
8
25
tR
Rise Time [2]
VT = 20% to 80% of swing
256
368
491
ps
tF
Fall Time [2]
VT = 20% to 80% of swing
225
307
417
ps
VOH
Output High Voltage [2]
VHIGH = 900mV, Fast Slew Rate,
156.25MHz, 312.5MHz - amplitude is reduced
by ~50% due to double termination. (Slow slew
rate is not recommended for frequencies
>100MHz)
415
448
480
mV
VOL
Output Low Voltage [2]
-6
14
35
VCROSS Crossing Voltage (abs) [3]
192
216
239
ΔVCROSS Crossing Voltage (var) [3][4][5]
-9
8
27
tR
Rise Time [2]
VT = 20% to 80% of swing
289
418
558
ps
tF
Fall Time [2]
VT = 20% to 80% of swing
227
302
406
ps
tDC
Output Duty Cycle [6]
6. Measured from differential waveform.
Across all settings in this table, VT = 0V.
48.6
49.6
50.5
%
Table 20. 100 ohm CLK AC/DC Characteristics – Double-Terminated, Non-PCIe Applications [1]
Symbol
Parameter
Conditions
Minimum
Typical
Maximum Unit
VOH
Output High Voltage [2]
VHIGH = 800mV, Fast Slew Rate,
156.25MHz, 312.5MHz - amplitude is reduced
by ~50% due to double termination. (Slow slew
rate is not recommended for frequencies >
100MHz)
399
428
456
mV
VOL
Output Low Voltage [2]
-7
13
34
VCROSS Crossing Voltage (abs) [3]
200
228
256
ΔVCROSS Crossing Voltage (var) [3][4][5]
-12
7
30
tR
Rise Time [2]
VT = 20% to 80% of swing
196
272
358
ps
tF
Fall Time [2]
VT = 20% to 80% of swing
214
293
388
ps



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