RC19302A00AGNT#KD0 datasheet(4/62 Pages) RENESAS

部件名	RC19302A00AGNT#KD0

功能描述	PCIe Gen7 1.8V 2-Input Clock Mux Family with LOS

PDF	62 Pages

Scroll/Zoom	100%

制造商	RENESAS [Renesas Technology Corp]

网页	http://www.renesas.com

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4 / 62 page

R31DS0210EU0106 Rev.1.06

Page 4

May 11, 2026

RC193xx Datasheet

1. Pin Information

1.1

Signal Types

1.2

Detailed Block Diagram

Figure 2. RC1930x Detailed Block Diagram

Term

Description

Input

Open Drain Output

I/O

Bi-Directional

Pull-down

Pull-up

Tristate

Driven

Don’t care

Single-ended

DIF

Differential

PWR

3.3 V power

GND

Ground

PDT

Power Down Tolerant: These signals tolerate being driven when the device

is powered down (VDD is not present).

PWRGD_PWRDNb

Ban k 1

SDATA

SCLK

OEb[7:0]

SADR_TRI[1:0]

ZOUTSEL_tri

Clock

Detect

LOS b

Control Logic

CLKSE L_tri

CLKb4

CLK4

CLK7

CLKb7

CLKIN0

CLKINb 0

CLKIN1

CLKINb1

8 outputs in 2 banks

Bank 0

CLKb0

CLK0

CLK3

CLKb3

SMBus

Inte rface

OTP

SLE WRATE_SEL

AMPLITUDE_SEL

Note 1, 2

Note 1

Note 1, 3

Note 1, 4

Note 1: RC19302 does not have these pins.

Note 2: RC19304, RC19304A100 do not have these pins.

Note 3: RC19308, RC19304 only.

Note 4: RC19308A100, RC19304A100 only.

RC19302A00AGNT#KD0 数据表(PDF) 4 Page - Renesas Technology Corp

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