STLS2F01 datasheet(39/48 Pages) STMICROELECTRONICS

39 / 48 page

STLS2F01

Electrical characteristics

39/48

6.4

AC parameters

Table 17.

Clock parameters

(Test Conditions: SYSCLK=100 MHz, PCICLK=133 MHz, MEMCLK=333 MHz,

CoreClk=1000 MHz)

Parameter

Min

Typ

Max

Unit

SYSCLK High Level Time

SYSCLK Low Level Time

SYSCLK Rising Time

SYSCLK Falling Time

SYSCLK Cycle Variation

±300

PCI_CLK High Level Time

PCI_CLK Low Level Time

PCI_CLK Rising Slew

1.5

V/ns

PCI_CLK Falling Slew

1.5

V/ns

PCI_CLK Cycle Variation

±500

MEMCLK High Level Time

1.41

1.59

MEMCLK Low Level Time

1.41

1.59

MEMCLK Rising Slew

V/ns

MEMCLK Falling Slew

V/ns

MEMCLK Cycle Variation

±225

DQS High Level Time

1.35

1.65

DQS Low Level Time

1.35

1.65

DQS Rising Slew

V/ns

DQS Falling Slew

V/ns

DQS Cycle Variation

±225

Table 18.

Input setup and hold time

(Test Conditions: SYSCLK=100 MHz, PCICLK=133 MHz, MEMCLK=333 MHz,

CoreClk=1000 MHz)

Parameter

Min

Tpy

Max

Unit

PCI_* Signals Setup Time

1.2

PCI_* Signals Hold Time

0.5

LIO_* Signals Setup Time

1.2

LIO_* Signals Hold Time

0.5

DDR2_DQ*/CB* Signals Setup Time

0.1

DDR2_DQ*/CB* Signals Hold Time

0.175

STLS2F01 数据表(PDF) 39 Page - STMicroelectronics

STLS2F01 数据表(HTML) 39 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48

数据表下载

链接网址

STLS2F01 数据表(PDF) 39 Page - STMicroelectronics

STLS2F01 数据表(HTML) 39 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48

数据表 下载

链接网址

数据表下载