SH7708 datasheet(39/633 Pages) RENESAS

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T bit: The T bit in the status register (SR) is used to indicate the result of compare operations, and

is read as a TRUE/FALSE condition determining if a conditional branch is taken or not. To

improve processing speed, the T bit logic state is modified only by specific operations. An

example of how the T bit may be used in a sequence of operations is shown below.

ADD

#1, R0

;T bit not modified by ADD operation

CMP/EQ

R1, R0

;T bit set to 1 when R0 = 0

TRGET

;branch taken to TRGET when T bit = 1 (R0 = 0)

Literals: Byte-length literals are inserted directly into the instruction code as immediate data. To

maintain the 16-bit fixed-length instruction code, word or longword literals are stored in a table in

main memory rather than inserted directly into the instruction code. The memory table is accessed

by the MOV instruction using PC-relative addressing with displacement, as follows:

MOV.W

@(disp, PC), R0

Absolute Addresses: As with word and longword literals, absolute addresses must also be stored

in a table in main memory. The value of the absolute address is transferred to a register and the

operand access is specified by indexed register-indirect addressing, with the absolute address

loaded (like word and longword immediate data) during instruction execution.

16-Bit and 32-Bit Displacements: In the same way, 16-bit and 32-bit displacements also must be

stored in a table in main memory. Exactly like absolute addresses, the displacement value is

transferred to a register and the operand access is specified by indexed register-indirect addressing,

loading the displacement (like word and longword immediate data) during instruction execution.

SH7708 数据表(PDF) 39 Page - Renesas Technology Corp