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SH7708 数据表(PDF) 55 Page - Renesas Technology Corp |
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SH7708 数据表(HTML) 55 Page - Renesas Technology Corp |
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55 / 633 page ![]() 37 Table 2.7 Arithmetic Instructions (cont) Instruction Operation Code Privileged Mode Cycles T Bit NEG Rm,Rn 0–Rm → Rn 0110nnnnmmmm1011 —1 — NEGC Rm,Rn 0–Rm–T → Rn, Borrow → T 0110nnnnmmmm1010 — 1 Borrow SUB Rm,Rn Rn–Rm → Rn 0011nnnnmmmm1000 —1 — SUBC Rm,Rn Rn–Rm–T → Rn, Borrow → T 0011nnnnmmmm1010 — 1 Borrow SUBV Rm,Rn Rn–Rm → Rn, Underflow → T 0011nnnnmmmm1011 — 1 Underflow Note: * The normal number of execution cycles is shown. The value in parentheses is the number of cycles required in case of contention with the preceding or following instruction. |
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