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SH7708 数据表(PDF) 92 Page - Renesas Technology Corp |
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SH7708 数据表(HTML) 92 Page - Renesas Technology Corp |
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92 / 633 page ![]() 74 Start TLB miss exception Initial page write exception PR check PR check Yes SH = 0 and (MMUCR.SV = 0 or SR.MD = 0)? VPNs and ASIDs match? VPNs match? No Yes Yes Yes Yes User or privileged? D = 1? C = 1? V = 1? No No User mode Privileged mode No No TLB protection violation exception TLB protection violation Cache access W 00/01 10 01/11 00/10 11 WW W RR R R R/W? R/W? R/W? R/W? TLB invalid exception Memory access No (noncacheable) Yes (cacheable) Figure 3.11 MMU Exception Generation Flowchart |
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