SH7708 datasheet(591/633 Pages) RENESAS

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Table A.6

Pin States (Burst ROM/Big-Endian) (cont)

32-Bit Bus Width

Byte

Access

(Address

4n)

Byte

Access

(Address

4n + 1)

Byte

Access

(Address

4n + 2)

Byte

Access

(Address

4n + 3)

Word

Access

(Address

4n)

Word

Access

(Address

4n + 2)

Longword

Access

D15 to D8

Invalid

data

Invalid

data

Valid

data

Invalid

data

Invalid

data

Valid

data

Valid

data

D23 to D16/

PORT7 to PORT0

Invalid

data

Valid

data

Invalid

data

Invalid

data

Valid

data

Invalid

data

Valid

data

D31 to D24

Valid

data

Invalid

data

Invalid

data

Invalid

data

Valid

data

Invalid

data

Valid

data

Notes: 1. When BCR1.A5PCM = 0, high-Z.

2. When BCR1.A6PCM = 0, high-Z.

3. When BCR1.DRAMTP (2–0)

≠ 101, high-Z.

4. When WCR2 register wait setting is 0, disabled.

5. When BCR2.PORTEN = 0, high-Z. When BCR2.PORTEN = 1, dependent on PCTR

6. When BCR2.PORTEN = 0, high-Z. When BCR2.PORTEN = 1, D31 and D30 only data

output.

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