 |
数据搜索系统，热门电子元器件搜索 |
|
|
数据搜索系统，热门电子元器件搜索 |
|
SH7708 数据表(PDF) 616 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
SH7708 数据表(HTML) 616 Page - Renesas Technology Corp |
|
|
616 / 633 page  598 Appendix B Control Registers B.1 Register Address Map The address map of memory-mapped control registers is shown in Table B-1. The following module abbreviations are used. MMU: Memory management unit UBC: User break controller CPG: Clock pulse generator BSC: Bus state controller RTC: Realtime clock INTC: Interrupt controller TMU: Timer unit SCI: Serial communication interface controller CAC: Cache The Bus column shows the internal bus to which the control register is connected. S: System bus, to which the CPU, cache, TLB, multiplier, and UBC are connected. C: Cache bus, to which the BSC and cache are connected. P: Peripheral bus, to which the BSC and peripheral modules (RTC, INTC, TMU, and SCI) are connected. The Size column shows the register size in bits. The Access Size column shows the size used when the control register is accessed (read or written). If a size other than that indicated is used in an access, the result will be incorrect. |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
