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SH7708 数据表(PDF) 326 Page - Renesas Technology Corp |
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SH7708 数据表(HTML) 326 Page - Renesas Technology Corp |
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326 / 633 page ![]() 308 Bit 5—Underflow Interrupt Control (UNIE): Controls enabling of interrupt generation when the status flag (UNF) indicating TCNT underflow has been set to 1. Bit 5: UNIE Description 0 Interrupts due to UNF (TUNI) are not enabled. (Initial value) 1 Interrupts due to UNF (TUNI) are enabled. Bits 4 and 3—Clock Edge 1 and 0 (CKEG1, CKEG0): These bits select the external clock edge when the external clock is selected, or when the input capture function is used. Bit 4: CKEG1 Bit 3: CKEG0 Description 0 0 Count/capture register set on rising edge (Initial value) 1 Count/capture register set on falling edge 1 — Count/capture register set on both rising and falling edge Bits 2 to 0—Timer Prescalers 2–0 (TPSC2–TPSC0): These bits select the TCNT count clock. Bit 2: TPSC2 Bit 1: TPSC1 Bit 0: TPSC0 Description 0 0 0 Internal clock: count on P φ/4 (Initial value) 1 Internal clock: count on P φ/16 1 0 Internal clock: count on P φ/64 1 Internal clock: count on P φ/256 1 0 0 Internal clock: count on clock output of on-chip RTC (RTCCLK) 1 External clock: count on TCLK pin input 1 0 Reserved ( Do not set) 1 Reserved (Do not set) |
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