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H8/3003 数据表(PDF) 4 Page - Renesas Technology Corp |
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H8/3003 数据表(HTML) 4 Page - Renesas Technology Corp |
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4 / 715 page ![]() Preface The H8/3003 is a high-performance microcontroller that integrates system supporting functions together with an H8/300H CPU core. The H8/300H CPU has a 32-bit internal architecture with sixteen 16-bit general registers, and a concise, optimized instruction set designed for speed. It can address a 16-Mbyte linear address space. The on-chip system supporting functions include RAM, a 16-bit integrated timer unit (ITU), a programmable timing pattern controller (TPC), a watchdog timer (WDT), a serial communication interface (SCI), an A/D converter, I/O ports, a direct memory access controller (DMAC), a refresh controller, and other facilities. The four operating modes offer a choice of data bus width and address space size, enabling the H8/3003 to adapt quickly and flexibly to a variety of conditions. This manual describes the H8/3003 hardware. For details of the instruction set, refer to the H8/300H Programming Manual. |
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