H8SLASH3003 datasheet(9/715 Pages) RENESAS

9 / 715 page

8.4.2

I/O Mode......................................................................................................... 198

8.4.3

Idle Mode........................................................................................................ 200

8.4.4

Repeat Mode................................................................................................... 203

8.4.5

Normal Mode.................................................................................................. 206

8.4.6

Block Transfer Mode ...................................................................................... 209

8.4.7

DMAC Activation........................................................................................... 214

8.4.8

DMAC Bus Cycle ........................................................................................... 216

8.4.9

Multiple-Channel Operation ........................................................................... 222

8.4.10

External Bus Requests, Refresh Controller, and DMAC................................ 225

8.4.11

NMI Interrupts and DMAC ............................................................................ 226

8.4.12

Aborting a DMA Transfer .............................................................................. 227

8.4.13

Exiting Full Address Mode............................................................................. 228

8.4.14

DMAC States in Reset State, Standby Modes, and Sleep Mode .................... 229

8.5

Interrupts ........................................................................................................................ 230

8.6

Usage Notes .................................................................................................................... 232

8.6.1

Note on Word Data Transfer........................................................................... 232

8.6.2

DMAC Self-Access ........................................................................................ 232

8.6.3

Longword Access to Memory Address Registers........................................... 232

8.6.4

Note on Full Address Mode Setup.................................................................. 232

8.6.5

Note on Activating DMAC by Internal Interrupts .......................................... 233

8.6.6

NMI Interrupts and Block Transfer Mode ...................................................... 234

8.6.7

Memory and I/O Address Register Values ..................................................... 234

8.6.8

Bus Cycle when Transfer is Aborted .............................................................. 235

Section 9

I/O Ports....................................................................................................... 237

9.1

Overview ........................................................................................................................ 237

9.2

Port 4

........................................................................................................................ 240

9.2.1

Overview......................................................................................................... 240

9.2.2

9.2.3

Pin Functions in Each Mode........................................................................... 243

9.2.4

Input Pull-Up Transistors................................................................................ 244

9.3

Port 5

........................................................................................................................ 245

9.3.1

Overview......................................................................................................... 245

9.3.2

9.3.3

Pin Functions in Each Mode........................................................................... 248

9.3.4

Input Pull-Up Transistors................................................................................ 249

9.4

Port 6

........................................................................................................................ 250

9.4.1

Overview......................................................................................................... 250

9.4.2

9.4.3

Pin Functions .................................................................................................. 252

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