H8SLASH3003 datasheet(52/715 Pages) RENESAS

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Table 2-5 Logic Operation Instructions

Instruction

Size*

Function

AND

B/W/L

∧ Rs → Rd, Rd ∧ #IMM → Rd

Performs a logical AND operation on a general register and another general

B/W/L

∨ Rs → Rd, Rd ∨ #IMM → Rd

Performs a logical OR operation on a general register and another general

XOR

B/W/L

⊕ Rs → Rd, Rd ⊕ #IMM → Rd

Performs a logical exclusive OR operation on a general register and another

general register or immediate data.

NOT

B/W/L

¬ Rd

→ Rd

Takes the one’s complement of general register contents.

Note: * Size refers to the operand size.

B: Byte

W: Word

Longword

Table 2-6 Shift Instructions

Instruction

Size*

Function

B/W/L

Rd (shift)

→ Rd

Performs an arithmetic shift on general register contents.

B/W/L

Rd (shift)

→ Rd

Performs a logical shift on general register contents.

B/W/L

Rd (rotate)

→ Rd

Rotates general register contents.

B/W/L

Rd (rotate)

→ Rd

Rotates general register contents through the carry bit.

Note: * Size refers to the operand size.

B: Byte

W: Word

Longword

SHAL,

SHAR

SHLL,

SHLR

ROTL,

ROTR

ROTXL,

ROTXR

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