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H8/3003 数据表(PDF) 14 Page - Renesas Technology Corp |
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H8/3003 数据表(HTML) 14 Page - Renesas Technology Corp |
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14 / 715 page ![]() 16.3 System Clock Divider (Clock-Halving Version) ............................................................ 510 16.4 Duty Adjustment Circuit (1:1 Version)........................................................................... 510 16.5 Prescalers ........................................................................................................................ 510 Section 17 Power-Down State .................................................................................... 511 17.1 Overview ........................................................................................................................ 511 17.2 Register Configuration.................................................................................................... 512 17.2.1 System Control Register (SYSCR)................................................................. 512 17.3 Sleep Mode ..................................................................................................................... 514 17.3.1 Transition to Sleep Mode................................................................................ 514 17.3.2 Exit from Sleep Mode..................................................................................... 514 17.4 Software Standby Mode ................................................................................................. 515 17.4.1 Transition to Software Standby Mode ............................................................ 515 17.4.2 Exit from Software Standby Mode ................................................................. 515 17.4.3 Selection of Waiting Time for Exit from Software Standby Mode ................ 516 17.4.4 Sample Application of Software Standby Mode ............................................ 517 17.4.5 Note................................................................................................................. 517 17.5 Hardware Standby Mode ................................................................................................ 518 17.5.1 Transition to Hardware Standby Mode........................................................... 518 17.5.2 Exit from Hardware Standby Mode................................................................ 518 17.5.3 Timing for Hardware Standby Mode.............................................................. 518 Section 18 Electrical Characteristics ........................................................................ 519 18.1 Absolute Maximum Ratings ........................................................................................... 519 18.2 Electrical Characteristics ................................................................................................ 520 18.2.1 DC Characteristics .......................................................................................... 520 18.2.2 AC Characteristics .......................................................................................... 529 18.2.3 A/D Conversion Characteristics ..................................................................... 536 18.3 Operational Timing......................................................................................................... 537 18.3.1 Bus Timing ..................................................................................................... 537 18.3.2 Refresh Controller Bus Timing....................................................................... 541 18.3.3 Control Signal Timing .................................................................................... 546 18.3.4 Clock Timing .................................................................................................. 548 18.3.5 TPC and I/O Port Timing................................................................................ 548 18.3.6 ITU Timing ..................................................................................................... 549 18.3.7 SCI Input/Output Timing................................................................................ 550 18.3.8 DMAC Timing................................................................................................ 551 |
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