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H8/3003 数据表(PDF) 469 Page - Renesas Technology Corp |
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H8/3003 数据表(HTML) 469 Page - Renesas Technology Corp |
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469 / 715 page ![]() Table 13-8 SMR Settings and Serial Communication Formats SCI Communication Format Multi- Stop Bit 7 Bit 6 Bit 2 Bit 5 Bit 3 Data processor Parity Bit C/ A CHR MP PE STOP Mode Length Bit Bit Length 00000 8-bit data Absent Absent 1 bit 00001 2 bits 00010 Present 1 bit 00011 2 bits 01000 7-bit data Absent 1 bit 01001 2 bits 01010 Present 1 bit 01011 2 bits 001— 0 8-bit data Present Absent 1 bit 001— 1 2 bits 011— 0 7-bit data 1 bit 011— 1 2 bits 1 ———— Synchronous 8-bit data Absent None mode Table 13-9 SMR and SCR Settings and SCI Clock Source Selection SMR SCR Settings Bit 7 Bit 1 Bit 0 C/ A CKE1 CKE0 Mode Clock Source SCK Pin Function 0 0 0 Asynchronous mode Internal SCI does not use the SCK pin 0 0 1 Outputs a clock with frequency matching the bit rate 0 1 0 External 01 1 1 0 0 Synchronous mode Internal Outputs the serial clock 10 1 1 1 0 External Inputs the serial clock 11 1 SMR Settings Asynchronous mode Asynchronous mode (multi- processor format) SCI Transmit/Receive Clock Inputs a clock with frequency 16 times the bit rate 451 |
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