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H8/3003 数据表(PDF) 649 Page - Renesas Technology Corp |
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H8/3003 数据表(HTML) 649 Page - Renesas Technology Corp |
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649 / 715 page ![]() TOCR—Timer Output Control Register H'91 ITU (all channels) Bit Initial value Read/Write 7 — 1 — 6 — 1 — 5 — 1 — 4 1 R/W 3 — 1 — 0 OLS3 1 R/W 2 — 1 — 1 OLS4 1 R/W Output level select 3 0 TIOCB , TOCXA , and TOCXB outputs are inverted 1 TIOCB , TOCXA , and TOCXB outputs are not inverted Output level select 4 0 TIOCA , TIOCA , and TIOCB outputs are inverted 1 TIOCA , TIOCA , and TIOCB outputs are not inverted External trigger disable 0 Input capture A in channel 1 is used as an external trigger signal in reset-synchronized PWM mode and complementary PWM mode 1 External triggering is disabled XTGD Note: * When an external trigger occurs, bits 5 to 0 in TOER are cleared to 0, disabling ITU output. 3 3 3 3 4 4 4 4 4 4 4 4 * 631 |
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