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H8/3003 数据表(PDF) 300 Page - Renesas Technology Corp |
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H8/3003 数据表(HTML) 300 Page - Renesas Technology Corp |
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300 / 715 page ![]() — PWM mode PWM output can be provided with an arbitrary duty cycle. With synchronization, up to five-phase PWM output is possible • Phase counting mode selectable in channel 2 Two-phase encoder output can be counted automatically. • Three additional modes selectable in channels 3 and 4 — Reset-synchronized PWM mode If channels 3 and 4 are combined, three-phase PWM output is possible with three pairs of complementary waveforms. — Complementary PWM mode If channels 3 and 4 are combined, three-phase PWM output is possible with three pairs of non-overlapping complementary waveforms. — Buffering Input capture registers can be double-buffered. Output compare registers can be updated automatically. • High-speed access via internal 16-bit bus The 16-bit timer counters, general registers, and buffer registers can be accessed at high speed via a 16-bit bus. • Fifteen interrupt sources Each channel has two compare match/input capture interrupts and an overflow interrupt. All interrupts can be requested independently. • Activation of DMA controller (DMAC) Four of the compare match/input capture interrupts from channels 0 to 3 can start the DMAC. • Output triggering of programmable pattern controller (TPC) Compare match/input capture signals from channels 0 to 3 can be used as TPC output triggers. 282 |
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