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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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H8/3028F 数据表(PDF) 330 Page - Renesas Technology Corp |
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H8/3028F 数据表(HTML) 330 Page - Renesas Technology Corp |
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330 / 923 page  Rev. 2.00, 09/03, page 300 of 890 Port B Data Register (PBDR): PBDR is an 8-bit readable/writable register that stores output data for pins port B. When port B functions as an output port, the value of this register is output. When a bit in PBDDR is set to 1, if port B is read the value of the corresponding PBDR bit is returned. When a bit in PBDDR is cleared to 0, if port B is read the corresponding pin logic level is read. Bit Initial value Read/Write 0 PB 0 R/W 0 1 PB 0 R/W 1 2 PB 0 R/W 2 3 PB 0 R/W 3 4 PB 0 R/W 4 5 PB 0 R/W 5 6 PB 0 R/W 6 7 PB 0 R/W 7 Port B data 7 to 0 These bits store data for port B pins PBDR is initialized to H'00 by a reset and in hardware standby mode. In software standby mode it retains its previous setting. |
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