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H8/3028F 数据表(PDF) 378 Page - Renesas Technology Corp |
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H8/3028F 数据表(HTML) 378 Page - Renesas Technology Corp |
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378 / 923 page ![]() Rev. 2.00, 09/03, page 348 of 890 • Input capture signal timing Input capture on the rising edge, falling edge, or both edges can be selected by settings in TIOR. Figure 9.23 shows the timing when the rising edge is selected. The pulse width of the input capture signal must be at least 1.5 system clocks for single-edge capture, and 2.5 system clocks for capture of both edges. N N φ Input-capture input Input capture signal 16TCNT GRA, GRB Figure 9.23 Input Capture Signal Timing 9.4.3 Synchronization The synchronization function enables two or more timer counters to be synchronized by writing the same data to them simultaneously (synchronous preset). With appropriate 16TCR settings, two or more timer counters can also be cleared simultaneously (synchronous clear). Synchronization enables additional general registers to be associated with a single time base. Synchronization can be selected for all channels (0 to 2). Sample Setup Procedure for Synchronization: Figure 9.24 shows a sample procedure for setting up synchronization. |
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