H8SLASH3028F datasheet(469/923 Pages) RENESAS

469 / 923 page

Rev. 2.00, 09/03, page 439 of 890

12.1.4

Table 12.2 summarizes the WDT registers.

Table 12.2 WDT Registers

Address*

Write*

Read

Name

Abbreviation

R/W

Initial Value

H'FFF8C

Timer control/status register

TCSR

R/(W)*

H'18

H'FFF8D

Timer counter

TCNT

R/W

H'00

H'FFF8E

H'FFF8F

Reset control/status register

RSTCSR

R/(W)*

H'3F

Notes: 1. Lower 20 bits of the address in advanced mode.

2. Write word data starting at this address.

3. Only 0 can be written in bit 7, to clear the flag.

12.2

12.2.1

Timer Counter (TCNT)

TCNT is an 8-bit readable and writable up-counter.

Bit

Initial value

Read/Write

Note: TCNT is write-protected by a password. For details see section 12.2.4, Notes on Register

Access.

R/W

When the TME bit is set to 1 in TCSR, TCNT starts counting pulses generated from an internal

clock source selected by bits CKS2 to CKS0 in TCSR. When the count overflows (changes from

H'FF to H'00), the OVF bit is set to 1 in TCSR. TCNT is initialized to H'00 by a reset and when

the TME bit is cleared to 0.

H8/3028F 数据表(PDF) 469 Page - Renesas Technology Corp

H8/3028F 数据表(HTML) 469 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载