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H8/3028F 数据表(PDF) 471 Page - Renesas Technology Corp

部件名 H8/3028F
功能描述  Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series
PDF  923 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

H8/3028F 数据表(HTML) 471 Page - Renesas Technology Corp

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Rev. 2.00, 09/03, page 441 of 890
Bit 6—Timer Mode Select (WT/
IT
IT
IT
IT): Selects whether to use the WDT as a watchdog timer or
interval timer. If used as an interval timer, the WDT generates an interval timer interrupt request
when TCNT overflows. If used as a watchdog timer, the WDT generates a reset signal when
TCNT overflows.
Bit 6
WT/
IT
IT
IT
IT
Description
0
Interval timer: requests interval timer interrupts
(Initial value)
1
Watchdog timer: generates a reset signal
Bit 5—Timer Enable (TME): Selects whether TCNT runs or is halted. When WT/
IT = 1, clear
the software standby bit (SSBY) to 0 in SYSCR before setting TME. When setting SSBY to 1,
TME should be cleared to 0.
Bit 5
TME
Description
0
TCNT is initialized to H'00 and halted
(Initial value)
1
TCNT is counting
Bits 4 and 3—Reserved: These bits cannot be modified and are always read as 1.
Bits 2 to 0—Clock Select 2 to 0 (CKS2/1/0): These bits select one of eight internal clock sources,
obtained by prescaling the system clock (
φ), for input to TCNT.
Bit 2
CKS2
Bit 1
CKS1
Bit 0
CKS0
Description
000
φ/2
(Initial value)
1
φ /32
10
φ /64
1
φ /128
100
φ /256
1
φ /512
10
φ /2048
1
φ /4096



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