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H8/3028F 数据表(PDF) 539 Page - Renesas Technology Corp |
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H8/3028F 数据表(HTML) 539 Page - Renesas Technology Corp |
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539 / 923 page ![]() Rev. 2.00, 09/03, page 509 of 890 Restrictions on Use of DMAC: • When an external clock source is used for the serial clock, after the DMAC updates TDR, allow an inversion of at least five system clock ( φ) cycles before input of the serial clock to start transmitting. If the serial clock is input within four states of the TDR update, a malfunction may occur. (See figure 13.22.) • To have the DMAC read RDR, be sure to select the corresponding SCI receive-data-full interrupt (RXI) as the activation source with bits DTS2 to DTS0 in DTCR. SCK D0 D1 D2 D3 D4 D5 D6 D7 TDRE t Note: In operation with an external clock source, be sure that t >4 states. Figure 13.22 Example of Synchronous Transmission Using DMAC |
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