H8SLASH3028F datasheet(548/923 Pages) RENESAS

548 / 923 page

Rev. 2.00, 09/03, page 518 of 890

TDRE

R/(W)*

RDRF

R/(W)*

ORER

R/(W)*

ERS

R/(W)*

PER

R/(W)*

MPBT

R/W

TEND

MPB

Bit

Initial value

Read/Write

Transmit end

Status flag indicating end

of transmission

Error signal status (ERS)

Status flag indicating that an error

signal has been received

Note: * Only 0 can be written, to clear the flag.

Bits 7 to 5: These bits operate as in normal serial communication. For details see section 13.2.7,

Serial Status Register (SSR).

Bit 4—Error Signal Status (ERS): In smart card interface mode, this flag indicates the status of

the error signal sent from the receiving device to the transmitting device. The smart card interface

does not detection framing errors.

Bit 4

ERS

Description

Indicates normal transmission, with no error signal returned

(Initial value)

[Clearing conditions]

The chip is reset, or enters standby mode or module stop mode

Software reads ERS while it is set to 1, then writes 0.

Indicates that the receiving device sent an error signal reporting a parity error

[Setting condition]

A low error signal was sampled.

Note: Clearing the TE bit to 0 in SCR does not affect the ERS flag, which retains its previous

value.

Bits 3 to 0: These bits operate as in normal serial communication. For details see section 13.2.7,

Serial Status Register (SSR). The setting conditions for transmit end (TEND), however, are

modified as follows.

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