H8SLASH3028F datasheet(661/923 Pages) RENESAS

部件名	H8/3028F

功能描述	Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

PDF	923 Pages

Scroll/Zoom	100%

制造商	RENESAS [Renesas Technology Corp]

网页	http://www.renesas.com

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661 / 923 page

Rev. 2.00, 09/03, page 631 of 890

19.5.1

Table 19.4 summarizes the frequency division register.

Table 19.4 Frequency Division Register

Address*

Name

Abbreviation

R/W

Initial Value

H'EE01B

Division control register

DIVCR

R/W

H'FC

Note: * Lower 20 bits of the address in advanced mode.

19.5.2

Division Control Register (DIVCR)

DIVCR is an 8-bit readable/writable register that selects the division ratio of the frequency

divider.

Bit

Initial value

Read/Write

—

DIV0

R/W

—

DIV1

R/W

Reserved bits

Divide bits 1 and 0

These bits select the

frequency division ratio

DIVCR is initialized to H'FC by a reset and in hardware standby mode. It is not initialized in

software standby mode.

Bits 7 to 2—Reserved: These bits cannot be modified and are always read as 1.

Bits 1 and 0—Divide (DIV1, DIV0): These bits select the frequency division ratio, as follows.

Bit 1

DIV1

Bit 0

DIV0

Frequency Division Ratio

1/1

(Initial value)

1/2

1/4

1/8

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