AT89C5122D-RDRUM datasheet(70/208 Pages) ATMEL

70 / 208 page

AT83R5122, AT8xC5122/23

4202F–SCR–07/2008

Power-on and Power-off FSM

The Power-on Power-off Finite State Machine (FSM) applies the signals on the smart

card in accordance with ISO7816-3 standard. It conducts the Activation (Cold Reset and

Warm Reset as well as De-Activation) it also manages the exception conditions such as

overcurrent (see DC/DC Converter)

To be able to power on the SCIB, the card presence is mandatory. Upon detectection of

a card presence, the Terminal initiate a Cold Reset Activation.

The Cold Reset Activation Terminal procedure is as follow and the Figure 36. Timing

indications are given according to ISO IEC 7816

–

RESET= Low , I/O in the receive state

–

Power Vcc (see DC/DC Converter)

–

Once Vcc is established, apply Clock at time Ta

–

Maintain Reset Low until time Ta+tb (tb< 400 clocks)

–

Monitor The I/O line for the Answer To Reset (ATR) between 400 and 40000

clock cycles after Tb. ( 400 clocks < tc < 40000clocks)

Figure 36.

SCIB Activation Cold Reset Sequence after a Card Insertion

The Warm Reset Activation Terminal procedure is as follow and the Figure 37

–

Vcc active, Reset = High, CLK active

–

Terminal drive Reset low at time T to initiate the warm Reset. Reset=0

maintained for at least 400 clocks until time Td = T+te (400 clocks < te)

–

Terminal keep the IO line in receive state

–

Terminal drive Reset high after at least 400 clocks at time Td

–

ICC shall respond with an ATR within 40000 clocks (tf<40000 clocks)

Figure 37.

SCIB Activation Warm Reset Sequence

CVCC

CRST

CCLK

CIO

Data

Undefined

Ta+tb

Tb+tc

CVCC

CRST

CCLK

CIO

Data

TTd=T + te

Td + tf

Undefined

AT89C5122D-RDRUM 数据表(PDF) 70 Page - ATMEL Corporation

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