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AT89C5122D-RDRUM 数据表(PDF) 78 Page - ATMEL Corporation |
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AT89C5122D-RDRUM 数据表(HTML) 78 Page - ATMEL Corporation |
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78 / 208 page ![]() 78 AT83R5122, AT8xC5122/23 4202F–SCR–07/2008 Reset Value = 0X00 0000b Table 45. Smart Card Contacts Register - SCCON (S:ACh, SCRS=0) 765 43 21 0 CLK - CARDC8 CARDC4 CARDIO CARDCLK CARDRST CARDVCC Bit Number Bit Mnemonic Description 7CLK Card Clock Selection Clear this bit to use the Card CLK bit (CARDCLK bit below) to drive Card CLK (P1.4) pin. Set this bit to use CK_XTAL1 or CK_PLL signals for CK_ISO to drive the Card CLK pin (CCLK = P1.4 pin) Note: internal synchronization avoids glitches on the CLK pin when switching this bit. 6- Reserved This bit can be changed by software but the read value is indeterminate. 5 CARDC8 Card C8 Clear this bit to drive a low level on the Card C8 pin (CC8 = P1.1 pin). Set this bit to set a high level on the Card C8 pin (CC8 = P1.1 pin).. The CC8 pin can be used as a pseudo bi-directional I/O when this bit is set. Warning : VCARDOK=1 (SCISR.4 bit) condition must be true to change the state of CC8 pin 4 CARDC4 Card C4 Clear this bit to drive a low level on the Card C4 pin (CC4 = P1.3 pin). Set this bit to set a high level on the Card C4 pin (CC4 = P1.3 pin). The CC4 pin can be used as a pseudo bi-directional I/O when this bit is set. Warning : VCARDOK=1 (SCISR.4 bit) condition must be true to change the state of CC4 pin 3CARDIO Card I/O If UART bit is cleared in SCICR register, this bit enables the use of the Card IO pin (CIO = P1.0) as a C51 pseudo bi-directional port : To read from CIO (P1.0) port pin : set CARDIO (P1.0) bit then read CARDIO (P1.0) bit to have the CIO port value To write in CIO (P1.0) port pin : set CARDIO (P1.0) bit to write a 1 in CIO (P1.0) port pin , clear CARDIO (P1.0) bit to write a 0 in CIO (P1.0) port pin. Warning : VCARDOK=1 (SCISR.4 bit) condition must be true to change the state of CIO pin 2 CARDCLK Card CLK When the CLK bit is cleared in SCCON Register, the value of this bit is driven to the Card CLK pin. Warning : VCARDOK=1 (SCISR.4 bit) condition must be true to change the state of Card CLK pin 1 CARDRST Card RST Clear this bit to drive a low level on the Card RST pin. Set this bit to set a high level on the Card RST pin. Warning : VCARDOK=1 (SCISR.4 bit) condition must be true to change the state of Card RST pin 0 CARDVCC Card VCC Control Clear this bit to desactivate the Card interface and set its power-off. The other bits of SCCON register have no effect while this bit is cleared. Set this bit to power-on the Card interface. The activation sequence should be handled by software. |
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