AT89C5122D-RDRUM datasheet(72/208 Pages) ATMEL

72 / 208 page

AT83R5122, AT8xC5122/23

4202F–SCR–07/2008

Additional Features

Clock

The CK_ISO input must be in the range 1 - 5 MHz according to ISO 7816.

The CK_ISO can be programmed up to 12 MHz. In this case, the timing specification of

the output buffer will not comply to ISO 7816.

Figure 40.

Clock Diagram of the SCIB Block

Figure 41.

Prescaler 2 Description

The division factor SCICLK must be smaller than 49. If it is greater or equal to 49, the

PR2 prescaler is locked.

See Figure 17 clock tree diagram in the clock controller chapter.

Table 42.

Examples of Clock settings

Card Presence Input

The internal pull-up (weak pull-up) on Card Presence input can be disconnected in order

to reduce the consumption (CPRESRES, bit 3 in PMOD0).

In this case, an external resistor (typically 1 M

Ω) must be externally tied to Vcc.

CPRES input can generate an interrupt (see Interrupt system section).

The detection level can be selected.

PR2

Ck_cpu

Ck_ISO

SCIB

CK_PLL or

CK_IDLE

CK_XTAL1

PR2

1/(2*(48 - SCICLK[5-0]))

CK_ISO

EXT48

PLLCON.2

CK_PLL

CK_XTAL1

XTSCS

SCICLK.7

SCICLK[5:0]

<48

=48

XTAL1 (MHz)

EXT48

SCICLK

CK_ ISO

AT89C5122D-RDRUM 数据表(PDF) 72 Page - ATMEL Corporation

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