AT89C5122D-RDRUM datasheet(55/208 Pages) ATMEL

55 / 208 page

AT83R5122, AT8xC5122/23

4202F–SCR–07/2008

Port Configuration

Standard I/O P0

The P0 port is described in Figure 22.

Figure 22.

Standard Input/Output Port

Quasi Bi-directional Port

The default port output configuration for standard I/O ports is the quasi-bi-directional

output that is common on the 80C51 and most of its derivatives. The “Port51” output

type can be used as both an input and output without the need to reconfigure the port.

This is possible because when the port outputs a logic high, it is weakly driven, allowing

an external device to pull the pin low.

When the port outputs a logic low state, it is driven strongly and is able to sink a fairly

large current.

These features are somewhat similar to an open-drain output except that there are three

pull-up transistors in the quasi-bi-directional output that serve different purposes.

One of these pull-ups, called the weak pull-up, is turned on whenever the port latch for

the pin contains a logic 1. The weak pull-up sources a very small current that will pull the

pin high if it is left floating. The weak pull-up can be turned off by the DPU bit in AUXR

A second pull-up, called the medium pull-up, is turned on when the port latch for the pin

contains a logic 1 and the pin itself is also at a logic 1 level. This pull-up provides the pri-

mary source current for a quasi-bi-directional pin that is outputting a 1. If a pin that has a

logic 1 on it is pulled low by an external device, the medium pull-up turns off, and only

the weak pull-up remains on. In order to pull the pin low under these conditions, the

external device has to sink enough current to overpower the medium pull-up and take

the voltage on the port pin below its input threshold.

Note:

for CIO, CC4, CC8 ports of SCIB interface , in input mode when the ICC (smart card) is

driving the port pin :

–

if 0 < Vin < CVCC/2 : weak pull-up is active (~100KOhm)

–

if CVCC/2 < Vin < CVCC : weak (~100KOhm) and medium (~12KOhm) pull-

up’s are active

MUX

ADDR/DATA CONTROL

Vcc

Input

Data

Port latch

Data

PMOS

NMOS

Vss

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