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AT89C5122D-RDRUM 数据表(PDF) 48 Page - ATMEL Corporation |
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AT89C5122D-RDRUM 数据表(HTML) 48 Page - ATMEL Corporation |
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48 / 208 page ![]() 48 AT83R5122, AT8xC5122/23 4202F–SCR–07/2008 USB Interface Clock The USB Interface uses two clocks : – The first one is the CPU clock used for the interface with the microcontroller, CK_IDLE. – The second one is the CK_USB supplied from the PLL through a divider by 2. Registers Reset Value = XXXX XXX0b Reset Value = XXXX 1111b Table 24. Clock Selection Register - CKSEL (S:85h) 7654 3210 ---- --- CKS Bit Number Bit Mnemonic Description 7:1 - Reserved The value read from this bit is indeterminate. Do not set this bit. 0CKS CPU Oscillator Select Bit Set this bit to connect CPU and Peripherals to PLL output. Clear this to to connect CPU and Peripherals to XTAL1 clock input. Table 25. Clock Reload Register - CKRL (S:97h) 765 43210 - - - - CKRL3 CKRL2 CKRL1 CKRL0 Bit Number Bit Mnemonic Description 7 - 4 - Reserved The value read from this bit is indeterminate. Do not set this bit. 3:0 CKRL3:0 Clock Reload register Prescaler1 value Fck_cpu =[ 1 / 2*(16-CKRL)] * Fck_XTAL1 |
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