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AD9548/PCBZ 数据表(PDF) 49 Page - Analog Devices

部件名 AD9548/PCBZ
功能描述  Quad/Octal Input Network Clock Generator/Synchronizer
PDF  112 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD9548/PCBZ 数据表(HTML) 49 Page - Analog Devices

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AD9548
Rev. 0 | Page 49 of 112
EXAMPLE
CONDITION 3 AND
CONDITION 13
ARE TAGGED
EEPROM
EEPROM CONTROLLER
UPLOAD
PROCEDURE
CONDITION
HANDLER
DOWNLOAD
PROCEDURE
CONDITION
TAG BOARD
1
6
5
4
3
2
11
10
9
8
7
30
31
24
23
22
21
20
19
18
17
16
15
14
13
12
25
26
27
28
29
IF B1
≤ INSTRUCTION ≤ CF,
THEN TAG DECODED CONDITION
EXECUTE/SKIP
INSTRUCTION(S)
SCRATCH
PAD
COND ITION
CONDITION = 0E01, BITS[4:0]
ELSE
CONDITION = FncInit, BITS[7:3]
ENDIF
M7
M3
IF INSTRUCTION = B0,
THEN CLEAR ALL TAGS
FncInit, BITS[7:3]
REGISTER
0E01, BITS[4:0]
STORE CONDITION
INSTRUCTIONS AS
THEY ARE READ FROM
THE SCRATCH PAD.
WATCH FOR
OCCURRENCE OF
CONDITION
INSTRUCTIONS
DURING
DOWNLOAD.
IF {NO TAGS} OR {CONDITION = 0}
EXECUTE INSTRUCTIONS
ELSE
IF {CONDITION IS TAGGED}
EXECUTE INSTRUCTIONS
ELSE
SKIP INSTRUCTIONS
ENDIF
ENDIF
5
5
5
IF {0E01, BITS[4:0]
≠ 0}
Figure 50. EEPROM Conditional Processing
The condition is a 5-bit value with 32 possibilities. Condition = 0
is the null condition. When the null condition is in effect, the
EEPROM controller executes all instructions unconditionally.
The remaining 31 possibilities, condition = 1 through condition
= 31, modify the EEPROM controller’s handling of a download
sequence. The condition originates from one of two sources
(see Figure 50), as follows:
FncInit, Bits[7:3], which is the state of the M3 to M7
multifunction pins at power-up (see the Initial Pin
Programming section)
Register 0E01, Bits[4:0]
If Register 0E01, Bits[4:0] ≠ 0, then the condition is the value
stored in Register 0E01, Bits[4:0]; otherwise, the condition is
FncInit, Bits[7:3]. Note that a nonzero condition present in
Register 0E01, Bits[4:0] takes precedence over FncInit, Bits[7:3].
The condition tag board is a table maintained by the EEPROM
controller. When the controller encounters a condition instruct-
tion, it decodes the B1 through CF instructions as condition = 1
through condition = 31, respectively, and tags that particular
condition in the condition tag board. However, the B0
condition instruction decodes as the null condition, for which
the controller clears the condition tag board, and subsequent
download instructions execute unconditionally (until the
controller encounters a new condition instruction).
During download, the EEPROM controller executes or skips
instructions depending on the value of condition and the
contents of the condition tag board. Note, however, that
condition instructions and the end instruction always execute
unconditionally during download. If condition = 0, then all
instructions during download execute unconditionally. If
condition ≠ 0 and there are any tagged conditions in the
condition tag board, then the controller executes instructions
only if the condition is tagged. If the condition is not tagged,
then the controller skips instructions until it encounters a
condition instruction that decodes as a tagged condition. Note
that the condition tag board allows for multiple conditions to be
tagged at any given moment. This conditional processing
mechanism enables the user to have one download instruction
sequence with many possible outcomes depending on the value
of the condition and the order in which the controller
encounters condition instructions.
Table 27 lists a sample EEPROM download instruction sequence.
It illustrates the use of condition instructions and how they alter
the download sequence. The table begins with the assumption
that no conditions are in effect. That is, the most recently executed
condition instruction is B0 or no conditional instructions have
been processed.



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