521 datasheet(73/96 Pages) INTEL

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Datasheet

Land Listing and Signal Descriptions

VID[5:0]

Output

VID[5:0] (Voltage ID) signals are used to support automatic selection of power

supply voltages (VCC). These are open drain signals that are driven by the

processor and must be pulled up on the motherboard. Refer to the Voltage

Regulator-Down (VRD) 10.1 Design Guide for Desktop Socket 775 for more

information. The voltage supply for these signals must be valid before the VR

can supply VCC to the processor. Conversely, the VR output must be disabled

until the voltage supply for the VID signals becomes valid. The VID signals are

needed to support the processor voltage specification variations. See Table 2-2

for definitions of these signals. The VR must supply the voltage that is

requested by the signals, or disable itself.

VSS

Input

VSS are the ground pins for the processor and should be connected to the

system ground plane.

VSSA

Input

VSSA is the isolated ground for internal PLLs.

VSS_SENSE

Output

VSS_SENSE is an isolated low impedance connection to processor core VSS. It

can be used to sense or measure ground near the silicon with little noise.

VSS_MB_

REGULATION

Output

This land is provided as a voltage regulator feedback sense point for VSS. It is

connected internally in the processor package to the sense point land V27 as

described in the Voltage Regulator-Down (VRD) 10.1 Design Guide for Desktop

Socket 775.

VTT

Miscellaneous voltage supply.

VTT_OUT_LEFT

VTT_OUT_RIGHT

Output

The VTT_OUT_LEFT and VTT_OUT_RIGHT signals are included to provide a

voltage supply for some signals that require termination to VTT on the

motherboard.

For future processor compatibility some signals are required to be pulled up to

VTT_OUT_LEFT or VTT_OUT_RIGHT. Refer to the following table for the

signals that should be pulled up to VTT_OUT_LEFT and VTT_OUT_RIGHT.

VTT_SEL

Output

The VTT_SEL signal is used to select the correct VTT voltage level for the

processor.

VTTPWRGD

Input

The processor requires this input to determine that the VTT voltages are stable

and within specification.

Table 4-3. Signal Description (Sheet 8 of 8)

Name

Type

Description

Pull-up Signal

Signals to be Pulled Up

VTT_OUT_RIGHT

VTT_PWRGOOD, VID[5:0], GTLREF, TMS, TDI,

TDO, BPM[5:0], other VRD components

VTT_OUT_LEFT

RESET#, BR0#, PWRGOOD, TESTHI1, TESTHI8,

TESTHI9, TESTHI10, TESTHI11, TESTHI12

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