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521 数据表(PDF) 48 Page - Intel Corporation

部件名 521
功能描述  Pentium 4 Processors Supporting Hyper-Threading Technology
PDF  96 Pages
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制造商  INTEL [Intel Corporation]
网页  http://www.intel.com
标志 INTEL - Intel Corporation

521 数据表(HTML) 48 Page - Intel Corporation

Back Button 521 Datasheet HTML 44Page - Intel Corporation 521 Datasheet HTML 45Page - Intel Corporation 521 Datasheet HTML 46Page - Intel Corporation 521 Datasheet HTML 47Page - Intel Corporation 521 Datasheet HTML 48Page - Intel Corporation 521 Datasheet HTML 49Page - Intel Corporation 521 Datasheet HTML 50Page - Intel Corporation 521 Datasheet HTML 51Page - Intel Corporation 521 Datasheet HTML 52Page - Intel Corporation Next Button
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Land Listing and Signal Descriptions
48
Datasheet
ITP_CLK1
AJ3
TAP
Input
LINT0
K1
Asynch GTL+
Input
LINT1
L1
Asynch GTL+
Input
LL_ID0
V2
Power/Other
Output
LL_ID1
AA2
Power/Other
Output
LOCK#
C3
Common Clock Input/Output
MCERR#
AB3
Common Clock Input/Output
MSID0
W1
Power/Other
Output
MSID1
V1
Power/Other
Output
PROCHOT#
AL2
Asynch GTL+
Input/Output
PWRGOOD
N1
Power/Other
Input
REQ0#
K4
Source Synch
Input/Output
REQ1#
J5
Source Synch
Input/Output
REQ2#
M6
Source Synch
Input/Output
REQ3#
K6
Source Synch
Input/Output
REQ4#
J6
Source Synch
Input/Output
RESERVED
A20
RESERVED
AC4
RESERVED
AE3
RESERVED
AE4
RESERVED
AE6
RESERVED
AH2
RESERVED
C9
RESERVED
D1
RESERVED
D14
RESERVED
D16
RESERVED
E23
RESERVED
E24
RESERVED
E5
RESERVED
E6
RESERVED
E7
RESERVED
F23
RESERVED
F29
RESERVED
F6
RESERVED
G10
RESERVED
B13
RESERVED
J3
RESERVED
N4
RESERVED
N5
RESERVED
P5
Table 4-1. Alphabetical Land
Assignments
Land Name
Land
#
Signal Buffer
Type
Direction
RESERVED
Y3
RESERVED
D23
RESERVED
AK6
RESERVED
G6
RESET#
G23
Common Clock
Input
RS0#
B3
Common Clock
Input
RS1#
F5
Common Clock
Input
RS2#
A3
Common Clock
Input
RSP#
H4
Common Clock
Input
SKTOCC#
AE8
Power/Other
Output
SMI#
P2
Asynch GTL+
Input
STPCLK#
M3
Asynch GTL+
Input
TCK
AE1
TAP
Input
TDI
AD1
TAP
Input
TDO
AF1
TAP
Output
TESTHI0
F26
Power/Other
Input
TESTHI1
W3
Power/Other
Input
TESTHI2
F25
Power/Other
Input
TESTHI3
G25
Power/Other
Input
TESTHI4
G27
Power/Other
Input
TESTHI5
G26
Power/Other
Input
TESTHI6
G24
Power/Other
Input
TESTHI7
F24
Power/Other
Input
TESTHI8
G3
Power/Other
Input
TESTHI9
G4
Power/Other
Input
TESTHI10
H5
Power/Other
Input
TESTHI11
P1
Power/Other
Input
TESTHI12
W2
Power/Other
Input
TESTHI13
L2
Asynch GTL+
Input
THERMDA
AL1
Power/Other
THERMDC
AK1
Power/Other
THERMTRIP#
M2
Asynch GTL+
Output
TMS
AC1
TAP
Input
TRDY#
E3
Common Clock
Input
TRST#
AG1
TAP
Input
VCC
AA8
Power/Other
VCC
AB8
Power/Other
VCC
AC23
Power/Other
VCC
AC24
Power/Other
VCC
AC25
Power/Other
Table 4-1. Alphabetical Land
Assignments
Land Name
Land
#
Signal Buffer
Type
Direction



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