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Datasheet

Electrical Specifications

2.10

Absolute Maximum and Minimum Ratings

Table 2-7 specifies absolute maximum and minimum ratings. Within functional operation limits,

functionality and long-term reliability can be expected.

At conditions outside functional operation condition limits, but within absolute maximum and

minimum ratings, neither functionality nor long-term reliability can be expected. If a device is

returned to conditions within functional operation limits after having been subjected to conditions

outside these limits, but within the absolute maximum and minimum ratings, the device may be

functional, but with its lifetime degraded depending on exposure to conditions exceeding the

functional operation condition limits.

At conditions exceeding absolute maximum and minimum ratings, neither functionality nor long-

term reliability can be expected. Moreover, if a device is subjected to these conditions for any

length of time then, when returned to conditions within the functional operating condition limits, it

will either not function, or its reliability will be severely degraded.

Although the processor contains protective circuitry to resist damage from static electric discharge,

precautions should always be taken to avoid high static voltages or electric fields.

2.11

Processor DC Specifications

The processor DC specifications in this section are defined at the processor core silicon and

not at the package lands unless noted otherwise. See Chapter 4 for the signal definitions and

signal assignments. Most of the signals on the processor FSB are in the GTL+ signal group. The

DC specifications for these signals are listed in Table 2-12.

Previously, legacy signals and Test Access Port (TAP) signals to the processor used low-voltage

CMOS buffer types. However, these interfaces now follow DC specifications similar to GTL+. The

DC specifications for these signal groups are listed in Table 2-11 and Table 2-13.

Table 2-8 through Table 2-15 list the DC specifications for the Pentium 4 processor in the 775-land

package and are valid only while meeting specifications for case temperature, clock frequency, and

input voltages. Care should be taken to read all notes associated with each parameter.

MSR_PLATFORM_BRV bit 18 is a Platform Requirement Bit (PRB) that indicates that the

processor has specific platform requirements.

Table 2-7. Processor DC Absolute Maximum Ratings

Symbol

Parameter

Min

Max

Unit

Notes1, 2

NOTES:

For functional operation, all processor electrical, signal quality, mechanical and thermal specifications must be satisfied.

Excessive overshoot or undershoot on any signal will likely result in permanent damage to the processor.

VCC

Core voltage with respect to

VSS

–0.3

1.55

—

VTT

FSB termination voltage with

respect to VSS

–0.3

1.55

—

Processor case temperature

See Section 5

°C

—

TSTORAGE

Processor storage temperature

–40

+85

°C

3, 4

Storage temperature is applicable to storage conditions only. In this scenario, the processor must not receive a clock, and

no lands can be connected to a voltage bias. Storage within these limits will not affect the long-term reliability of the device.

For functional operation, refer to the processor case temperature specifications.

This rating applies to the processor and does not include any tray or packaging.

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