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SPEAR320 数据表(PDF) 62 Page - STMicroelectronics |
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SPEAR320 数据表(HTML) 62 Page - STMicroelectronics |
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62 / 73 page ![]() Timing requirements SPEAr320 62/73 Doc ID 16755 Rev 5 Caution: Data in Table 43 subject to SMII functional issue described in the SPEAr320 errata sheet. 7.11 SMI - Serial memory interface timing characteristics Figure 23. SMI I/O waveforms Table 43. SMII timings Symbol Description Min Max Unit tCK SMII clock 8 8 ns tS Setup time requirement for SMII_RX -0.90 tH Hold time requirement for receive SMII_RX 2.904 tD SMII_CLKIN to SMII_TX output delay 4.12 14.17 Table 44. SMI timings Symbol Description Min Max Unit tCK SMI clock period 20 50 ns tD SMI_CLK to SMI_DATAOUT output delay -2.96 3.05 tS Setup requirement for SMI_DATAIN 9.69 tH Hold requirement for SMI_DATAIN -2.53 tCSf Min and max delay of falling edge of SMI_CS_0 , 1 w.r.t SMI_CLK -3.0 2.9 tCSr Min and max delay of rising edge of SMI_CS_0 , 1 w.r.t SMI_CLK -2.8 2.8 SMI_CLK SMI_DATAIN tS tH tCK tD tCSf tCSr SMI_DATAOUT SMI_CS_0,1 |
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