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SPEAR320 数据表(PDF) 17 Page - STMicroelectronics |
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SPEAR320 数据表(HTML) 17 Page - STMicroelectronics |
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17 / 73 page  SPEAr320 Architecture overview Doc ID 16755 Rev 5 17/73 ● Hash matching of unicast and multicast destination addresses ● External address matching of received frames ● Physical layer management through MDIO interface ● Supports serial network interface operation ● Half duplex flow control by forcing collisions on incoming frames ● Full duplex flow control with recognition of incoming pause frames and hardware generation of transmitted pause frames ● Support for 802.1Q VLAN tagging with recognition of incoming VLAN and priority tagged frames ● Multiple buffers per receive and transmit frame ● Wake on LAN support ● Jumbo frames of up to 10240 bytes supported ● Configurable Endianess for the DMA Interface (AHB Master) |
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