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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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SPEAR320 数据表(PDF) 38 Page - STMicroelectronics |
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SPEAR320 数据表(HTML) 38 Page - STMicroelectronics |
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38 / 73 page  Pin description SPEAr320 38/73 Doc ID 16755 Rev 5 PL_GPIO_33/E7 CAN0_TX CAN0_TX CAN0_TX UART1_DCD basGPIO5 GPIO_33 PL_GPIO_32/D7 CAN0_RX CAN0_RX CAN0_RX UART1_DSR basGPIO4 GPIO_32 PL_GPIO_31/C7 CAN1_TX CAN1_TX CAN1_TX UART1_RTS basGPIO3 GPIO_31 PL_GPIO_30/B7 CAN1_RX CAN1_RX CAN1_RX basGPIO2 GPIO_30 PL_GPIO_29/A7 UART1_TX UART1_TX UART1_TX UART1_TX basGPIO1 GPIO_29 PL_GPIO_28/A6 UART1_RX UART1_RX UART1_RX UART1_RX basGPIO0 GPIO_28 PL_GPIO_27/B6 SMII0_TX 0 SMII0_TX SMII0_TX MII0_TXCLK GPIO_27 PL_GPIO_26/A5 SMII0_RX 0 SMII0_RX SMII0_RX MII0_TXD0 GPIO_26 PL_GPIO_25/C6 SMII1_TX 0 0 SMII1_TX MII0_TXD1 GPIO_25 PL_GPIO_24/B5 SMII1_RX 0 0 SMII1_RX MII0_TXD2 GPIO_24 PL_GPIO_23/A4 SMII_SYNC 0 SMII_SYNC SMII_SYNC MII0_TXD3 GPIO_23 PL_GPIO_22/D6 SMII_CLKOUT 0 SMII_CLKOUT SMII_CLKOUT MII0_TXEN GPIO_22 PL_GPIO_21/C5 SMII_CLKIN 0 SMII_CLKIN SMII_CLKIN MII0_TXER GPIO_21 PL_GPIO_20/B4 SSP1_MOSI 0 0 SSP1_MOSI MII0_RXCLK GPIO_20 PL_GPIO_19/A3 SSP1_CLK 0 0 SSP1_CLK MII0_RXDV GPIO_19 PL_GPIO_18/D5 SSP1_SS0 0 0 SSP1_SS0 MII0_RXER GPIO_18 PL_GPIO_17/C4 SSP1_MISO 0 0 SSP1_MISO MII0_RXD0 GPIO_17 PL_GPIO_16/E6 SSP2_MOSI 0 0 0 MII0_RXD1 GPIO_16 PL_GPIO_15/B3 SSP2_CLK 0 PWM0 PWM0 MII0_RXD2 GPIO_15 PL_GPIO_14/A2 SSP2_SS0 0 PWM1 PWM1 MII0_RXD3 GPIO_14 PL_GPIO_13/A1 SSP2_MISO 0 PWM2 PWM2 MII0_COL GPIO_13 PL_GPIO_12/D4 PWM3 0 PWM3 PWM3 MII0_CRS GPIO_12 PL_GPIO_11/E5 SMII_MDIO 0 SMII_MDIO SMII_MDIO MII0_MDC GPIO_11 PL_GPIO_10/C3 SMII_MDC 0 SMII_MDC SMII_MDC MII0_MDIO GPIO_10 PL_GPIO_9/B2 0 0 0 0 SSP0_MOSI GPIO_9 PL_GPIO_8/C2 0 0 0 0 SSP0_CLK GPIO_8 PL_GPIO_7/D3 0 0 0 0 SSP0_SS0 GPIO_7 PL_GPIO_6/B1 0 0 0 0 SSP0_MISO GPIO_6 PL_GPIO_5/D2 0 0 0 0 I2C0_SDA GPIO_5 PL_GPIO_4/C1 0 0 0 0 I2C0_SCL GPIO_4 PL_GPIO_3/D1 0 0 0 0 UART0_RX GPIO_3 PL_GPIO_2/E4 0 0 0 0 UART0_TX GPIO_2 Table 11. PL_GPIO multiplexing scheme (continued) PL_GPIO_# / ball number Configuration mode (enabled by Programmer model control register bits (2:0)) Alternate function (enabled by RAS select register) Function in GPIO alternative mode 12 3 4 |
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