ST7LITE25F2 datasheet(153/166 Pages) STMICROELECTRONICS

153 / 166 page

ST7LITE20F2 ST7LITE25F2 ST7LITE29F2

Device configuration

Doc ID 8349 Rev 5

153/166

Note:

For further information, see clock management block diagram in Figure 13

15.2

Device ordering information and transfer of customer code

Customer code is made up of the FASTROM contents and the list of the selected options (if

any).

The FASTROM contents are to be sent on diskette, or by electronic means, with the S19

hexadecimal file generated by the development tool. All unused bytes must be set to FFh.

The selected options are communicated to STMicroelectronics using the correctly

completed Option list appended on Table 98: ST7LITE2 FASTROM microcontroller option

list.

Refer to application note AN1635 for information on the counter listing returned by ST after

code has been transferred.

The STMicroelectronics Sales Organization will be pleased to provide detailed information

on contractual points.

Table 96.

List of valid option combinations

Operating conditions

Option bits

VDD range

Clock Source

PLL

Typ fCPU

OSC

PLLOFF PLLx4x8

2.4V - 3.3V

Internal RC 1%(1)

Configuration available on ST7LITE25 and ST7LITE29 devices only

off

0.7MHz @3V

2.8MHz @3V

−−

−

External clock or

oscillator

(depending on OPT6:4

selection)

off

0-4MHz

4MHz

−−

−

3.3V - 5.5V

Internal RC 1%(1)

off

1MHz @5V

−−

−

8MHz @5V

External clock or

oscillator

(depending on OPT6:4

selection)

off

0-8MHz

−−

−

8 MHz

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