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ADRF6850BCPZ-R7 数据表(PDF) 27 Page - Analog Devices

部件名 ADRF6850BCPZ-R7
功能描述  100 MHz to 1000 MHz Integrated Broadband Receiver
PDF  36 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADRF6850BCPZ-R7 数据表(HTML) 27 Page - Analog Devices

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ADRF6850
Rev. 0 | Page 27 of 36
REGISTER BIT DESCRIPTIONS
Table 9. Register CR0 (Address 0x00), Fractional Word 4
Bit
Description
7
Fractional Word F71
6
Fractional Word F61
5
Fractional Word F51
4
Fractional Word F41
3
Fractional Word F31
2
Fractional Word F21
1
Fractional Word F11
0
Fractional Word F0 (LSB)1
1 Double buffered. Load on the write to Register CR0.
Table 10. Register CR1 (Address 0x01), Fractional Word 3
Bit
Description
7
Fractional Word F151
6
Fractional Word F141
5
Fractional Word F131
4
Fractional Word F121
3
Fractional Word F111
2
Fractional Word F101
1
Fractional Word F91
0
Fractional Word F81
1 Double buffered. Load on the write to Register CR0.
Table 11. Register CR2 (Address 0x02), Fractional Word 2
Bit
Description
7
Fractional Word F231
6
Fractional Word F221
5
Fractional Word F211
4
Fractional Word F201
3
Fractional Word F191
2
Fractional Word F181
1
Fractional Word F171
0
Fractional Word F161
1 Double buffered. Load on the write to Register CR0.
Table 12. Register CR3 (Address 0x03), Fractional Word 1
Bit
Description
7
Reserved
6
Reserved
5
Reserved
4
Reserved
3
Reserved
2
Reserved
1
Reserved
0
Fractional Word F24 (MSB)1
1 Double buffered. Load on the write to Register CR0.
Table 13. Register CR5 (Address 0x05), Reference 5-Bit,
R-Divider Enable
Bit
Description
7
Reserved
6
Reserved
5
Reserved
4
5-bit R-divider enable1
0 = disable 5-bit R-divider (default)
1 = enable 5-bit R-divider
3
Reserved
2
Reserved
1
Reserved
0
Reserved
1 Double buffered. Load on the write to Register CR0.
Table 14. Register CR6 (Address 0x06), Integer Word 2
Bit
Description
7
Integer Word N71
6
Integer Word N61
5
Integer Word N51
4
Integer Word N41
3
Integer Word N31
2
Integer Word N21
1
Integer Word N11
0
Integer Word N01
1 Double buffered. Load on the write to Register CR0.
Table 15. Register CR7 (Address 0x07), Integer Word 1
Bit
Description
[7:4]
MUXOUT control
0000 = tristate
0001 = logic high
0010 = logic low
1101 = RCLK/2
1110 = NCLK/2
3
Integer Word N111
2
Integer Word N101
1
Integer Word N91
0
Integer Word N81
1 Double buffered. Load on the write to Register CR0.



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