ADRF6850BCPZ-R7 datasheet(31/36 Pages) AD

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ADRF6850

Rev. 0 | Page 31 of 36

EVALUATION BOARD

GENERAL DESCRIPTION

The evaluation board is designed to allow the user to evaluate

the performance of the ADRF6850. It contains the following:

•

The ADRF6850 DUT. This is an I/Q demodulator with an

integrated fractional-N PLL and VCO.

•

SPI and I2C interface connectors.

•

Baseband output connectors.

•

Fourth-order low-pass loop filter circuitry.

•

13.5 MHz reference clock, and the ability to drive the

reference input external to the board.

•

Circuitry to support differential signaling to the TESTLO

inputs, including dc biasing circuitry.

•

Circuitry to monitor the LOMON outputs.

•

SMA connectors for power supplies, the VGAIN input and

a single-ended RF input.

The evaluation board comes with associated software to allow

easy programming of the ADRF6850.

HARDWARE DESCRIPTION

For more information, refer to the circuit diagram in Figure 69.

Power Supplies

An external +3.3 V supply (DUT + 3.3 V) powers each of the

nine VCCx supplies on the ADRF6850 as well as the 13.5 MHz

clock reference.

Recommended Decoupling for Supplies

Initially, the external +3.3 V supply is decoupled by a 10 µF

capacitor and then further by a parallel combination of 100 nF

and 56 pF capacitors that are placed as close to the DUT as

possible for good local decoupling. The impedance of all these

capacitors should be low and constant across a broad frequency

range. Surface-mount multilayered ceramic chip (MLCC) Class II

capacitors provide very low ESL and ESR, which assist in

decoupling supply noise effectively. They also provide good

temperature stability and good aging characteristics. Capacitance

changes per the bias voltage that is applied. Larger case sizes have

less capacitance change vs. applied bias voltage, and also lower

ESR but higher ESL. A combination of 0402 size cases for the

56 pF capacitors and 0603 size cases for the 100 nF capacitors

give a good compromise allowing the 56 pF capacitors to be

placed as close as possible to the supply pins on the top side of

the PCB with the 100 nF capacitors placed on the bottom side

of the PCB quite close to the supply pins. X5R and X7R

capacitors are examples of these types of capacitors and are

recommended for decoupling.

SPI and I2C Interface

The SPI interface connector is a nine-way, D-type connector that

can be connected to the printer port of a PC. Figure 68 shows

the PC cable diagram that must be used with the provided

software.

There is also an option to use the I2C interface by using the I2C

receptacle connector. This is a standard I2C connector. A supply

voltage of +3.3 V is provided by the I2C bus master. Pull-up

resistors are required on the signal lines. The CS pin can be

used to set the slave address of the ADRF6850. CS high sets the

slave address to 0x78, and CS low sets the slave address to 0x58.

9-WAY

FEMALE

D-TYPE

25-WAY

MALE

D-TYPE

TO PC

PRINTER PORT

GND

CLK

DATA

Figure 68. SPI PC Cable Diagram

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