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ADRF6850BCPZ-R7 数据表(PDF) 5 Page - Analog Devices

部件名 ADRF6850BCPZ-R7
功能描述  100 MHz to 1000 MHz Integrated Broadband Receiver
PDF  36 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADRF6850BCPZ-R7 数据表(HTML) 5 Page - Analog Devices

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ADRF6850
Rev. 0 | Page 5 of 36
TIMING CHARACTERISTICS
I2C Interface Timing
Table 2.
Parameter1
Symbol
Limit
Unit
SCL Clock Frequency
f
SCL
400
kHz max
SCL Pulse Width High
t
HIGH
600
ns min
SCL Pulse Width Low
t
LOW
1300
ns min
Start Condition Hold Time
t
HD;STA
600
ns min
Start Condition Setup Time
t
SU;STA
600
ns min
Data Setup Time
t
SU;DAT
100
ns min
Data Hold Time
t
HD;DAT
300
ns min
Stop Condition Setup Time
t
SU;STO
600
ns min
Data Valid Time
t
VD;DAT
900
ns max
Data Valid Acknowledge Time
t
VD;ACK
900
ns max
Bus Free Time
t
BUF
1300
ns min
1 See Figure 2.
SDA
tHD;STA
tSU;DAT
START
CONDITION
STOP
CONDITION
S
S
S
P
SCL
1/
fSCL
tHIGH
tLOW
tHD;DAT
tVD;DAT AND
tVD;ACK (ACK SIGNAL ONLY)
tBUF
tSU;STO
tSU;STA
Figure 2. I2C Port Timing Diagram



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