LSM6DB0 datasheet(32/66 Pages) STMICROELECTRONICS

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Microprocessor functionality

LSM6DB0

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DocID025603 Rev 1

The clock management block distributes clocks from various clock sources to the CPU and

peripherals. The clock management block is comprised of the following circuitry and

switches:



Clock divider: the system contains various clock dividers which allow the frequency of

the peripherals and CPU clock sources to be changed.



Glitch-free clock switching: the clock sources can be changed dynamically and

securely in active mode.



Clock gating: the peripherals can have their clocks gated off to reduce their power

consumption.



Three system clock sources:

– RC80M 80 MHz internal RC oscillator which is trimmed at 1% accuracy with factory

settings

– RC32K 32 kHz internal RC oscillator which is trimmed at 1% accuracy with factory

settings

– EXTCLK external clock up to 80 MHz

 Watchdog clock sources: the RC32k or EXTCLK.

 I2C clock source: system clock divided by 3.

 UART clock source: system clock divided by a programmable division factor between 1

and 127.

 SPI clock source: clock synchronous to the processor.

 Dual timers: four timers clocked by 32 kHz clock pulses synchronous to the system clock

sources and four timers clocked on a clock synchronous to the processor clock.

 Clock-out capability: either the 32 kHz clock or the output of the divide-by-5 clock can be

output on a GPIO for external use.

LSM6DB0 数据表(PDF) 32 Page - STMicroelectronics