LSM6DB0 datasheet(33/66 Pages) STMICROELECTRONICS

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LSM6DB0

Microprocessor functionality

8.6

General-purpose inputs/outputs (GPIOs)

The LSM6DB0 contains up to 11 GPIO pins each of which can be configured by software as

output, as input (either pull-up or pull-down), or as an alternate function in serial mode 0 or

serial mode1 (see Table 13). Each of the GPIOs can also be used as an external interrupt

source.

8.7

Memories

The LSM6DB0 has the following memory features:

– Flash memory with 0 wait states at 26.66 MHz and 2 wait states at 80 MHz

– SRAM with ECC for data and program access (read/write) referred to as RAM bank0

– SRAM for data and program access (read/write) referred to as RAM bank1

– Memory protection: the Flash and RAM memory banks cannot be read from or written

to by the JTAG link if the debug features are connected.

Table 13. Alternate function input/output

name

Serial mode 0

Serial mode 1

GPIO mode

Direction

Function

Direction

Function

Direction

Function

IO0

Input/Output

JTAG TMS / SW_TDIO

Input

UART CTS

Input/Output

GPIO

IO1

Input

JTAG TCK / SW_TCK

Output

UART RTS

IO2

Input/Output

I2C2_SCL

UART TXD

IO3

I2C2_SDA

Input

UART RXD

IO4

Output

JTAG TDO

None

IO5

Input

JTAG TDI

Clock input

IO6

Output

16 MHz clock

Output

32 kHz clock

IO7

Input/Output

I2C1_SCL

Input/Output

SPI SCLK

IO8

I2C1_SDA

Output

SPI output

IO9

Input

IRQ input

Input

SPI CS

IO10

SPI input

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